In the manufacture of semiconductor products, substrates (e.g., semiconductor wafers) are processed by successively depositing, etching, and polishing various layers to create semiconductor devices. Plasmas and more specifically plasma-enhanced etching and deposition have often been employed in these processing steps.
Generally speaking, process engineers strive to employ as much of the available area on a substrate as possible to fabricate the semiconductor devices. Due to process limitations and other factors, there is often a ring-shaped region at the outer edge of the substrate where device formation is not deemed reliable and therefore not often attempted. Since processing tends to be focused on the interior region of the substrate, particulate deposition of organic and inorganic materials often builds up in the vicinity of the aforementioned ring-shaped edge region. If the deposition is not removed through successive processing steps, some of the deposited material may flake off and contaminate the plasma processing chamber and/or the interior region of the substrate itself. Such contamination often leads to lower device yield for the substrate and may be as high as several percent.
To reduce and/or minimize the possibility that the deposited material in this ring-shaped edge region could flake off and lower device yield, process engineers have interleaved one or more bevel etch steps in between device-forming processing steps. In a typical bevel etch step, the device-forming region of the substrate is not processed with plasma. Rather, a bevel etch apparatus is employed to form a ring-shaped plasma near the periphery of the substrate to etch away some of the accumulated material at the substrate's outer edge. By interleaving one or more bevel etch steps into the device manufacturing process, undue built-up of accumulated deposition in the aforementioned ring-shaped edge region is inhibited. Accordingly, the possibility that some of the accumulated deposition in the ring-shaped edge region of the substrate may flake off is substantially reduced, leading to improved device yield.
As with most technology areas surrounding the manufacture of semiconductor products, constant innovation and improvement in the field of bevel etching is required to adapt to increasingly smaller etch feature sizes and larger substrates, which tend to place stringent demands on etch process windows. Improving the bevel etching process in the manufacture of semiconductor devices is one of the goals of the present invention.